53A-518 – Transient Digitizer card
53A-780 – Hooded Connector

• User programmable rates of up to 500,000 samples/second
• Fast preprocessing of stored data
• Capable of pre- and post-trigger event storage
• Selectable 12-bit (with 500K sample memory) or 8-bit (with 1M sample memory)
• On-card preprocessing

The 53A-518 Transient Digitizer Subsystem (TDS) is a high speed A/D converter with on-card memory for storing voltage measurement data.  The TDS can digitize analog input levels at a maximum rate of 500,000 (12-bit or 8-bit) measurements per second. The TDS can store 524,288 12-bit measurements or 1,048,576 8-bit measurements. Since the TDS has built-in memory and CPU it can collect data while the system controller is free to do other tasks.

The TDS memory is configured as a circular buffer so that the user has the ability to program a trigger event (input signal level or external input pulse), and also the number of measurements stored before and after the trigger event. This allows the events that occurred before the trigger to be captured.

Once a measurement sequence is completed. the system controller can request that each measurement taken be returned, or it can instruct the TDS to first preprocess the measurements before returning them. Preprocessing commands are available for such functions as: Mean, Standard Deviation. Minimum/Maximum of Measurement Values, RMS values of measurements stored. etc.

The input voltage ranges of the TDS. input coupling (AC DC). trigger source (internal or external). trigger filtering, and measurement sampling rate are fully programmable.  If the user wishes, an external sampling rate generator may be used.

Four LEDs provide Built-In-Test Equipment (“BITE”) for the A/D Card of the TDS. These LEDs indicate when a trigger event has occurred when a sampling sequence has been completed, when the inhibit input is low, and when the internal sampling rate generator has been enabled.

Eight LEDs provide BITE for the CPU card. These LEDs provide an indication of input range, 12-bit sampling, data preprocessing, digitizing and data storage, AC input signal coupling and detection of incorrect commands.

Ranges {programmable):
±9.995V, ±0.9995V, ±0.09995V

Input Coupling {programmable):
AC Coupled, 10 Hz to 250 KHz. ±0.6 dB.
DC Coupled, DC to 250 KHz, ±0.5 dB.

Input Amplifier:
Number of Input Channels. 1
Type Input. differential.
Input Impedance, 2 MOhm ±5%, shunted by <20 pf
Signal Input Range, ±12V
Maximum Input. AC coupled, 150V (DC+ peak AC). DC coupled.
High to Low Input. ±150V peak, either input to ground, ±150V peak.


System Accuracy Drift:
Without Dynamic Calibration. ±400 ppm/°C of full scale.
With Dynamic Calibration, N/A, drift error eliminated.

Sample and Hold:
Aperture Time. 18 nsec maximum.
Aperture Time Uncertainty. 60 ps maximum.

Memory Storage:
524,288 12-bit measurements or 1,048,576 8-bit measurements.

Memory Organization:
Circular buffer.

Maximum Sampling Rate
(8 or 12 bits) : 500,000 measurements per second.


External Sample Rate Generator:
Type Input TTL, negative going edge 1 TTL load.
Pulse Width, min, 75 nsec.
Pulse Rate, 500 KHz max.

A specified number of measurements is digitized unconditionally after the Trigger command is received from the system controller.

The TDS begins digitizing measurements when it receives a Trigger command and continues until a specified number of measurements have been stored after detecting a negative TTL edge on the External Trigger input. Minimum Pulse Width, 75 nsec.

Threshold Level:
The TDS begins digitizing measurements when it receives a Trigger command, and continues until a specified number of measurements have been stored after detecting the input signal above (or below) a programmed DC level.

Inhibit Input
Function, when low, prevents TDS from sampling.
Type Input TTL, low true, 1 TTL load.

External Trigger Output
Function, used to synchronize multiple TDS’s for simultaneous sampling.
Type Output TTL negative true pulse.
Simultaneous Sampling Uncertainty, ±75 nsec.

Data Output Format (programmable) :
Four decimal digits with sign and decimal point. 12/8-bit binary data packed into 8-bit bytes or blocked into records with a checksum.

Data Transfer Rate:
Greater than 60 thousand bytes. per second using binary transfer.

Programmed By:
ASCII Characters.

Calibration Cycle:
Six months.

Function Card Slots Used:
Two slots.

Recommended Cable: